Low-Voltage 1:10 Differential ECL/PECL/HSTL Clock Driver

The SK100EP111 is a low skew 1-to-10 diffferential driver, designed with Clock Distribution in mind. It accepts two Clock sources into an input multiplexer. The ECL/PECL input signals CAN be either differential or single-ended if the VBB output is used. HSTL inputs CAN be used when the EP111 is operating under PECL conditions. The selected signal is fanned out to 10 identical differential outputs. The SK100EP111 is specifically designed, modeled, and produced with low skew as the key goal. Optimal design and layout serve to minimize gate-to-gate skew within a device, and characterization is used to determine process control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. By Semtech Corporation