These 10-bit Flip-Flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider Buffer Registers I/O ports, bidirectional bus drivers with parity, and working Registers The ten Flip-Flops are edge-triggered D-type Flip-Flops On the positive transition of the Clock (CLK) input, the devices provide true data at the Q outputs. A buffered output-enable (OE) input CAN be used to place the ten outputs in either a normal Logic state (high or low Logic levels) or a high-impe- dance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for Interface or pullup components. OE does not affect the internal operations of the latch. Previously stored data CAN be retained or new data CAN be entered while the outputs are in the high-impedance state By Texas Instruments
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SN54ABT821 Pinout, Pinouts
SN54ABT821 pinout,Pin out
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