The ABTH18504A and ABTH182504A scan test devices with 20-bit universal Bus Transceivers are members of the Texas Instruments SCOPE testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) Interface In the normal mode, these devices are 20-bit universal Bus Transceivers that combine D-type Latches and D-type Flip-Flops to allow data flow in transparent, latched, or clocked modes. The test circuitry CAN be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPE universal Bus Transceivers Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), clock-enable (CLKENAB and CLKENBA), and Clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A-bus data is latched while CLKENAB is high and/or CLKAB is held at a static low or high Logic level. Otherwise, if LEAB is low and CLKENAB is low, A-bus data is stored on a low-to-high transition of CLKAB. When OEAB is low, the B outputs are active. When OEAB is high, the B outputs are in the high-impedance state. B-to-A data flow is similar to A-to-B data flow, but uses the OEBA, LEBA, CLKENBA, and CLKBA inputs. In the test mode, the normal operation of the SCOPE universal Bus Transceivers is inhibited, and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry performs boundary-scan test operations according to the protocol described in IEEE Standard 1149.1-1990 By Texas Instruments
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SN54ABTH182504A Pinout, Pinouts
SN54ABTH182504A pinout,Pin out
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