The SN54ACT3641 is a high-speed, low-power, CMOS clocked FIFO memory. It supports Clock frequencies up to 50 MHz and has read access times as fast as 15 ns. The 1024 36 dual-port SRAM FIFO Buffers data from port A to port B. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. The FIFO has flags to indicate empty and full conditions and two programmable flags (almost full and almost empty) to indicate when a selected number of words is stored in memory. Communication between each port CAN take place with two 36-bit mailbox Registers Each mailbox Register has a flag to signal when new mail has been stored. Two or more devices CAN be used in parallel to create wider datapaths. Expansion is also possible in word depth. The SN54ACT3641 is a clocked FIFO which means each port employs a synchronous Interface All data transfers through a port are gated to the low-to-high transition of a continuous (free-running) port Clock by enable signals. The continuous Clocks for each port are independent of one another and CAN be asynchronous or coincident. The enables for each port are arranged to provide a simple Interface between Microprocessors and/or buses with synchronous control By Texas Instruments
Part Manufacturer Description Datasheet Samples
SN54ACT3641HFP Texas Instruments 1KX36 OTHER FIFO, 15ns, CQFP132, CERAMIC, QFP-132
SN54ACT3641 's PackagesSN54ACT3641 's pdf datasheet

SN54ACT3641 Pinout, Pinouts
SN54ACT3641 pinout,Pin out
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