DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

These devices SN54ALS74A SN54AS74A SN74ALS74A SN74AS74A contain two independent positive-edge-triggered D-type Flip-Flops A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the Clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input CAN be changed without affecting the levels at the outputs. The SN54ALS74A and SN54AS74A are characterized for operation over the full military temperature range of 55C to 125C. The SN74ALS74A and SN74AS74A are characterized for operation from 0C to 70C. By Texas Instruments
Part Manufacturer Description Datasheet Samples
SN54ALS74AJ Texas Instruments Dual Positive-Edge-Triggered D-type Flip-Flops With Clear And Preset 14-CDIP -55 to 125
SN54ALS74A 's PackagesSN54ALS74A 's pdf datasheet
SN54AS74A




SN54ALS74A Pinout, Pinouts
SN54ALS74A pinout,Pin out
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