3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERSThe HC138 are designed to be used in
high-performance memory-decoding or data-
routing applications requiring very short
propagation delay times SN54HC138 SN74HC138 . In high-performance
memory systems, these decoders CAN be used to
minimize the effects of system decoding. When
employed with high-speed Memories utilizing a
fast enable circuit, the delay times of these
decoders and the enable time of the memory are
usually less than the typical access time of the
memory. This means that the effective system
delay introduced by the decoders is negligible.
The conditions at the binary-select inputs at the
three enable inputs select one of eight output
lines. Two active-low and one active-high enable
inputs reduce the need for external Gates or
inverters when expanding. A 24-line decoder CAN
be implemented without external inverters and a
32-line decoder requires only one inverter. An
enable input CAN be used as a data input for
demultiplexing applications.
The SN54HC138 is characterized for operation over the full military temperature range of 55C to 125C. The
SN74HC138 is characterized for operation from 40C to 85C. By Texas Instruments
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Part | Manufacturer | Description | Datasheet | Samples | |
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SN54HC138J | Texas Instruments | 3-Line To 8-Line Decoders/Demultiplexers 16-CDIP -55 to 125 |
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SN54HC138 Pb-Free | SN54HC138 Cross Reference | SN54HC138 Schematic | SN54HC138 Distributor |
SN54HC138 Application Notes | SN54HC138 RoHS | SN54HC138 Circuits | SN54HC138 footprint |