The HCT138 SN54HCT138 SN74HCT138 are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders CAN minimize the effects of system decoding. When employed with high-speed Memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low (G) and one active-high (G) enable inputs reduce the need for external Gates or inverters when expanding. A 24-line decoder CAN be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input CAN be used as a data input for demultiplexing applications. The SN54HCT138 is characterized for operation over the full military temperature range of 55C to 125C. The SN74HCT138 is characterized for operation from 40C to 85C. By Texas Instruments
Part Manufacturer Description Datasheet Samples
SN54HCT138J Texas Instruments 3-Line To 8-Line Decoders/Demultiplexers 16-CDIP -55 to 125
SN54HCT138 's PackagesSN54HCT138 's pdf datasheet

SN54HCT138 Pinout, Pinouts
SN54HCT138 pinout,Pin out
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