The SN54LS222A 64-bit, low-power Schottky memory is organized as 16 words by 4 bits each. It CAN be expanded in multiples of 15m + 1 words or 4n bits, or both (where n is the number of packages in the vertical array, and m is the number of packages in the horizontal array); however, some external gating is required. For longer words, the input-ready (IR) signals of the first-rank packages and output-ready (OR) signals of the last-rank packages must be ANDed for proper synchronization. A first-in, first-out (FIFO) memory is a storage device that allows data to be written to and read from its array at independent data rates. These FIFOs are designed to process data at rates up to 10 MHz in a bit-parallel format, word by word. The load Clock (LDCK) normally is held low, and data is written into memory on the high-to-low transition of LDCK. The unload Clock (UNCK) normally is held high, and data is read out on the low-to-high transition of UNCK. The memory is full when the number of words clocked in exceeds by 16 the number of words clocked out. When the memory is full, LDCK signals have no effect on the data residing in memory. When the memory is empty, UNCK signals have no effect. By Texas Instruments
Part Manufacturer Description Datasheet Samples
SN54LS222AJ Rochester Electronics LLC FIFO, 16X4, 80ns, Synchronous, TTL, CDIP20, 0.300 INCH, CERAMIC, DIP-20
SN54LS222A 's PackagesSN54LS222A 's pdf datasheet

SN54LS222A Pinout, Pinouts
SN54LS222A pinout,Pin out
This is one package pinout of SN54LS222A,If you need more pinouts please download SN54LS222A's pdf datasheet.

SN54LS222A Application circuits
SN54LS222A circuits
This is one application circuit of SN54LS222A,If you need more circuits,please download SN54LS222A's pdf datasheet.

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