These dual 4-input positive-NAND Gates are designed for 2-V to 5.5-V VCC operation. The LV20A devices perform the Boolean function Y = A B C D or Y = A + B + C + D in positive Logic These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. By Texas Instruments
SN54LV20A 's PackagesSN54LV20A 's pdf datasheet

SN54LV20A Pinout, Pinouts
SN54LV20A pinout,Pin out
This is one package pinout of SN54LV20A,If you need more pinouts please download SN54LV20A's pdf datasheet.

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