These octal transparent D-type Latches SN54LV573 SN74LV573 are designed for 2.7-V to 5.5-V VCC operation. The LV573 feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing Buffer Registers I/O ports, bidirectional bus drivers, and working Registers While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the Logic levels set up at the D inputs. A buffered output-enable (OE) input CAN be used to place the eight outputs in either a normal Logic state (high or low Logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for Interface or pullup components. OE does not affect the internal operations of the Latches Old data CAN be retained or new data CAN be entered while the outputs are in the high-impedance state. The SN74LV573 is available in TIs shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54LV573 is characterized for operation over the full military temperature range of 55C to 125C. The SN74LV573 is characterized for operation from 40C to 85C. By Texas Instruments
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SN54LV573 Pinout, Pinouts
SN54LV573 pinout,Pin out
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