These octal edge-triggered D-type Flip-Flops SN54LVTH374 SN74LVTH374 are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL Interface to a 5-V system environment. The LVTH374 feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing Buffer Registers input/output (I/O) ports, bidirectional bus drivers, and working Registers On the positive transition of the Clock (CLK) input, the Q outputs are set to the Logic levels at the data (D) inputs. A buffered output-enable (OE) input CAN be used to place the eight outputs in either a normal Logic state (high or low Logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for Interface or pullup components. OE does not affect internal operations of the Flip-Flops Old data CAN be retained or new data CAN be entered while the outputs are in the high-impedance state. By Texas Instruments
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SN54LVTH374 Pinout, Pinouts
SN54LVTH374 pinout,Pin out
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