These octal Latches SN54LVTH573 SN74LVTH573 are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL Interface to a 5-V system environment. The eight Latches of the LVTH573 devices are transparent D-type Latches While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the Logic levels set up at the D inputs. A buffered output-enable (OE) input CAN be used to place the eight outputs in either a normal Logic state (high or low Logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for Interface or pullup components. OE does not affect the internal operations of the Latches Old data CAN be retained or new data CAN be entered while the outputs are in the high-impedance state. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid Logic level. By Texas Instruments
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SN54LVTH573 Pinout, Pinouts
SN54LVTH573 pinout,Pin out
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