512 X 18 Asynchronous FIFO Memory
A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ACT7804 !----> is a 512-word by 18-bit FIFO for high speed and fast access times. It processes data at rates up to 50 MHz and access times of 15 ns in a bit-parallel format.
Data is written into memory on a low-to-high transition at the load-clock (LDCK) input and is read out on a low-to-high transition at the unload-clock (UNCK) input. The memory is full when the number of words clocked in exceeds the number of words clocked out by 512. When the memory is full, LDCK signals have no effect on the data residing in memory. When the memory is empty, UNCK signals have no effect.
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and almost-full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the memory is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF output is high when the FIFO contains 256 or more words. The AF/AE status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset are used to program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable (PEN) is low. The AF/AE flag is high when the FIFO contains X or fewer words or (512 - Y) or more words. The AF/AE flag is low when the FIFO contains between (X + 1) and (511 - Y) words.
A low level on the reset (RESET) input resets the internal stack pointers and sets FULL high, AF/AE high, HF low, and EMPTY low. The Q outputs are not reset to any specific Logic level. The FIFO must be reset upon power up.
The first word loaded into empty memory causes EMPTY to go high and the data to appear on the Q outputs. It is important to note that the first word does not have to be unloaded. The data outputs are noninverting with respect to the data inputs and are in the high-impedance state when the output-enable (OE) input is high.
The SN74ACT7804 is characterized for operation from 0C to 70C.
By Texas Instruments
|SN74ACT7804-20DL||Texas Instruments||512 x 18 asynchronous FIFO memory 56-SSOP 0 to 70|
|SN74ACT7804-25DLR||Texas Instruments||512X18 OTHER FIFO, 22ns, PDSO56, 0.300 INCH, PLASTIC, SSOP-56|
|SN74ACT7804-25DL||Texas Instruments||512 x 18 asynchronous FIFO memory 56-SSOP 0 to 70|
|SN74ACT7804-40DLR||Texas Instruments||512 x 18 asynchronous FIFO memory 56-SSOP 0 to 70|
|SN74ACT7804-20DLR||Texas Instruments||512 x 18 asynchronous FIFO memory 56-SSOP 0 to 70|
|SN74ACT7804-40DL||Texas Instruments||512 x 18 asynchronous FIFO memory 56-SSOP 0 to 70|
|SN74ACT7804 Pb-Free||SN74ACT7804 Cross Reference||SN74ACT7804 Schematic||SN74ACT7804 Distributor|
|SN74ACT7804 Application Notes||SN74ACT7804 RoHS||SN74ACT7804 Circuits||SN74ACT7804 footprint|