2048 X 9 Asynchronous FIFO Memory
A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ACT7808 is a 2048-word by 9-bit FIFO designed for high speed and fast access times. It processes data at rates up to 50 MHz and access times of 15 ns in a bit-parallel format.
Data is written into memory on a low-to-high transition at the load-clock (LDCK) input and is read out on a low-to-high transition at the unload-clock (UNCK) input. The memory is full when the number of words clocked in exceeds the number of words clocked out by 2048. When the memory is full, LDCK signals have no effect on the data residing in memory. When the memory is empty, UNCK signals have no effect.
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and almost-full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the memory is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF output is high when the FIFO contains 1024 or more words and is low when it contains 1023 or fewer words. The AF/AE status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset CAN be used to program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable (PEN) is low. The AF/AE flag is high when the FIFO contains X or fewer words or (2048 Y) or more words. The AF/AE flag is low when the FIFO contains between (X + 1) and (2047 Y) words.
A low level on the reset (RESET) input resets the internal stack pointers and sets FULL high, AF/AE high, HF low, and EMPTY low. The Q outputs are not reset to any specific Logic level.
The first word loaded into empty memory causes EMPTY to go high and the data to appear on the Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs are noninverting with respect to the data inputs and are in the high-impedance state when the output-enable (OE) input is low. OE does not affect the output flags.
Cascading is easily accomplished in the word-width and word-depth directions. When not using the FIFO in depth expansion, cascade enable (CASEN) must be tied high.
The FIFO must be reset upon power up.
The SN74ACT7808 is characterized for operation from 0C to 70C.
By Texas Instruments
|SN74ACT7808-30PMR||Texas Instruments||2KX9 OTHER FIFO, 25ns, PQFP64, PLASTIC, LQFP-64|
|SN74ACT7808-40PAGR||Texas Instruments||2K X 9 OTHER FIFO, 28 ns, PQFP64, GREEN, PLASTIC, TQFP-64|
|SN74ACT7808-25PAGR||Texas Instruments||2K X 9 OTHER FIFO, 22 ns, PQFP64, GREEN, PLASTIC, TQFP-64|
|SN74ACT7808-20FNR||Texas Instruments||2KX9 OTHER FIFO, 20ns, PQCC44, GREEN, PLASTIC, LCC-44|
|SN74ACT7808-20PAGR||Texas Instruments||2KX9 OTHER FIFO, 20ns, PQFP64, GREEN, PLASTIC, TQFP-64|
|SN74ACT7808-25PMR||Texas Instruments||2KX9 OTHER FIFO, 22ns, PQFP64, PLASTIC, LQFP-64|
|SN74ACT7808-25PM||Texas Instruments||2048 X 9 asynchronous FIFO memory 64-LQFP 0 to 70|
|SN74ACT7808-25PAG||Texas Instruments||2048 X 9 asynchronous FIFO memory 64-TQFP 0 to 70|
|SN74ACT7808-20PM||Texas Instruments||2048 X 9 asynchronous FIFO memory 64-LQFP 0 to 70|
|SN74ACT7808-30PM||Texas Instruments||2048 X 9 asynchronous FIFO memory 64-LQFP 0 to 70|
|SN74ACT7808 Pb-Free||SN74ACT7808 Cross Reference||SN74ACT7808 Schematic||SN74ACT7808 Distributor|
|SN74ACT7808 Application Notes||SN74ACT7808 RoHS||SN74ACT7808 Circuits||SN74ACT7808 footprint|