12-Bit To 24-Bit Registered Bus Exchanger With 3-State OutputsThis 12-bit to 24-bit registered Bus Exchanger is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16270 is used in applications in which data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. The device provides synchronous data exchange between the two ports. Data is stored in the internal Registers on the low-to-high transition of the Clock (CLK) input when the appropriate CLKEN inputs are low. The select (SEL) line selects 1B or 2B data for the A outputs. For data transfer in the A-to-B direction, a two-stage pipeline is provided in the A-to-1B path, with a single storage Register in the A-to-2B path. Proper control of the CLKENA inputs allows two sequential 12-bit words to be presented synchronously as a 24-bit word on the B port. Data flow is controlled by the active-low output enables (OEA, OEB). The control terminals are registered to synchronize the bus-direction changes with CLK. To ensure the high-impedance state during power up or power down, a Clock pulse should be applied as soon as possible, and OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Due to OE being routed through a Register the active state of the outputs cannot be determined prior to the arrival of the first Clock pulse. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid Logic level. The SN74ALVCH16270 is characterized for operation from ?40C to 85C. By Texas Instruments |
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| SN74ALVCH16270 Application Notes | SN74ALVCH16270 RoHS | SN74ALVCH16270 Circuits | SN74ALVCH16270 footprint |
