20-Bit Universal Bus Driver With 3-State OutputsThis 20-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation.
Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is low. When LE is high, the A data is latched if the Clock (CLK) input is held at a high or low Logic level. If LE is high, the A data is stored in the latch Flip-Flop on the low-to-high transition of CLK. When OE is high, the outputs are in the high-impedance state. The output port includes equivalent 26- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid Logic level. The SN74ALVCH162836 is characterized for operation from ?40C to 85C. By Texas Instruments |
Part | Manufacturer | Description | Datasheet | Samples | |
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SN74ALVCH162836DGVR | Texas Instruments | 20-Bit Universal Bus Driver With 3-State Outputs 56-TVSOP -40 to 85 | |||
SN74ALVCH162836GR | Texas Instruments | 20-Bit Universal Bus Driver With 3-State Outputs 56-TSSOP -40 to 85 | |||
SN74ALVCH162836DGGR | Texas Instruments | 20-Bit Universal Bus Driver With 3-State Outputs 56-TSSOP -40 to 85 | |||
SN74ALVCH162836DL | Texas Instruments | 20-Bit Universal Bus Driver With 3-State Outputs 56-SSOP -40 to 85 |
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SN74ALVCH162836 Pb-Free | SN74ALVCH162836 Cross Reference | SN74ALVCH162836 Schematic | SN74ALVCH162836 Distributor |
SN74ALVCH162836 Application Notes | SN74ALVCH162836 RoHS | SN74ALVCH162836 Circuits | SN74ALVCH162836 footprint |