9-Bit 4-Port Universal Bus Exchanger With 3-State Outputs
This 9-bit, 4-port universal Bus Exchanger is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH16409 allows synchronous data exchange between four different buses. Data flow is controlled by the select (SEL0-SEL4) inputs. A data-flow state is stored on the rising edge of the Clock (CLK) input if the select-enable (SELEN) input is low. Once a data-flow state has been established, data is stored in the Flip-Flop on the rising edge of CLK if SELEN is high.
The data-flow control Logic is designed to allow glitch-free data transmission.
When preset (PRE) transitions high, the outputs are disabled immediately, without waiting for a Clock pulse. To leave the high-impedance state, both PRE and SELEN must be low and a Clock pulse must be applied.
To ensure the high-impedance state during power up or power down, PRE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid Logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
By Texas Instruments
|SN74ALVCH16409DL||Texas Instruments||9-Bit 4-Port Universal Bus Exchanger With 3-State Outputs 56-SSOP -40 to 85|
|SN74ALVCH16409DGGR||Texas Instruments||ALVC/VCX/A SERIES, DUAL 9-BIT EXCHANGER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSSOP-56|
|SN74ALVCH16409DLR||Texas Instruments||ALVC/VCX/A SERIES, DUAL 9-BIT EXCHANGER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, SSOP-56|
|SN74ALVCH16409 Pb-Free||SN74ALVCH16409 Cross Reference||SN74ALVCH16409 Schematic||SN74ALVCH16409 Distributor|
|SN74ALVCH16409 Application Notes||SN74ALVCH16409 RoHS||SN74ALVCH16409 Circuits||SN74ALVCH16409 footprint|