1-To-4 Address Register/Driver With 3-State Outputs

This 1-bit to 4-bit address Register driver is designed for 1.65-V to 3.6-V VCC operation. The device is ideal for use in applications in which a single address bus is driving four separate memory locations. The SN74ALVCH16831 CAN be used as a Buffer or a Register depending on the Logic level of the select (SEL) input.
When SEL is Logic high, the device is in the Buffer mode. The outputs follow the inputs and are controlled by the two output-enable (OE) controls. Each OE controls two groups of nine outputs.
When SEL is Logic low, the device is in the Register mode. The Register is an edge-triggered D-type Flip-Flop On the positive transition of the Clock (CLK) input, data set up at the A inputs is stored in the internal Registers OE controls operate the same as in Buffer mode.
When OE is Logic low, the outputs are in a normal Logic state (high or low Logic level). When OE is Logic high, the outputs are in the high-impedance state.
SEL and OE do not affect the internal operation of the Flip-Flops Old data CAN be retained or new data CAN be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid Logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
By Texas Instruments