Dual Jk Negative Edge-triggered Flip-flop , Inc

The SN54 /74LS113A offers individual J, K, set, and Clock inputs. These monolithic dual Flip-Flops are designed so that when the Clock goes HIGH, the inputs are enabled and data will be accepted. The Logic level of the J and K inputs may be allowed to change when the Clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum setup times are observed. Input data is transferred to the outputs on the negative-going edge of the Clock pulse. By Freescale Semiconductor, Inc
SN74LS113A 's PackagesSN74LS113A 's pdf datasheet

SN74LS113A Pinout, Pinouts
SN74LS113A pinout,Pin out
This is one package pinout of SN74LS113A,If you need more pinouts please download SN74LS113A's pdf datasheet.

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