Quadruple D-Type Flip-Flops With Clear
These monolithic, positive-edge-triggered Flip-Flops utilize TTL circuitry to implement D-type Flip-Flop Logic All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each Flip-Flop
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the Clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the Clock input is at either the high or low level, the D input signal has no effect at the output.
These circuits are fully compatible for use with most TTL circuits.
By Texas Instruments
|SN74LS175 Pb-Free||SN74LS175 Cross Reference||SN74LS175 Schematic||SN74LS175 Distributor|
|SN74LS175 Application Notes||SN74LS175 RoHS||SN74LS175 Circuits||SN74LS175 footprint|