Low-Power, Dual Supply, Level Translating CompactFlash Interface With 16-Bit Data, 11-Bit Address

This CompactFlash? (CF) Interface chip is designed to provide a single-chip solution for CF card Interfaces Separate VCC rails for the system bus side and the CF connector bus side allow voltage-level shifting. This is helpful for interfacing between a core chipset, which may operate from 3.3 V down to 1.65 V, and CF cards, which operate from 3.3-V or 5-V supply voltages. All the input Buffers feature the input-disable function, which allows conditional floating input signals. The input, output, and I/O Buffers on the CF connector side have been defined to comply with CF+ and CompactFlash specification revisions 1.4 and 2.0.
This device has 16-bit data lines and 24-bit address/command lines. CD1 and CD2 have internal pullup resistors to pull them to a high Logic state if there is no card in the CF slot. The presence of a CF card in the CF card slot generates a low Logic signal at SCD. A separate power-supply pin, VCC_SD, controls the SCD output Buffer The SCD signal CAN be used to control a voltage Regulator which may power the CF slot and the CF side of this device. VCC_SD is particularly helpful when the core processor operates at a low VCC, but the Regulator needs a higher control signal voltage.
The MASTER_EN signal controls all the Buffers and transceivers except CD1 and CD2. If MASTER_EN is high, the SN74LV4320A is in a power-down mode. The BUF_EN signal, in conjunction with MASTER_EN, controls the 11-bit address lines and 13-bit control/command lines.
The 16-bit data lines use two separate enable signals. ENL, in conjunction with MASTER_EN, controls the lower 8-bit data lines (D07-D00). ENH, in conjunction with MASTER_EN, controls the upper 8-bit data lines (D15-D08). A DIR(S/CF) input controls the data direction between the system bus and the CF card. An additional DIR_OUT pin generates the DIR(S/CF) signal using the SOE and SIORD signals. With either SOE or SIORD being low, the data direction is from the CF card side to the system side (DIR_OUT = L). DIR(S/CF) and DIR_OUT are placed adjacent to each other, which is convenient for connecting DIR(S/CF) and DIR_OUT, if DIR_OUT is used. This saves an additional signal from the system controller to control the data direction.
BVD1, BVD2, INPACK, READY, WAIT, and WP have 100-k internal pullup resistors, eliminating the need for external pullups. The resistors are within the tolerance of CF+ and CompactFlash specification revisions 1.4 and 2.0.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
By Texas Instruments
Part Manufacturer Description Datasheet Samples
SN74LV4320AGKFR Texas Instruments Low-Power, Dual Supply, Level Translating CompactFlash Interface With 16-Bit Data, 11-Bit Address 114-BGA MICROSTAR -40 to 85
SN74LV4320AZKFR Texas Instruments Low-Power, Dual Supply, Level Translating CompactFlash Interface With 16-Bit Data, 11-Bit Address 114-LFBGA -40 to 85
SN74LV4320A 's PackagesSN74LV4320A 's pdf datasheet
SN74LV4320AGKFR LFBGA
SN74LV4320AZKFR LFBGA




SN74LV4320A Pinout will be updated soon..., now you can download the pdf datasheet to check the pinouts !
SN74LV4320A circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

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