32-Bit Transparent D-Type Latch With 3-State Outputs

This 32-bit transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC32373A is particularly suitable for implementing Buffer Registers I/O ports, bidirectional bus drivers, and working Registers It CAN be used as four 8-bit Latches two 16-bit Latches or one 32-bit latch. When the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. A buffered output-enable (OE) input CAN be used to place the eight outputs in either a normal Logic state (high or low Logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without Interface or pullup components. OE does not affect internal operations of the latch. Old data CAN be retained or new data CAN be entered while the outputs are in the high-impedance state. Inputs CAN be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
By Texas Instruments
Part Manufacturer Description Datasheet Samples
SN74LVC32373AZKER Texas Instruments 32-Bit Transparent D-Type Latch with 3-State Outputs 96-LFBGA -40 to 85
SN74LVC32373AGKER Texas Instruments 32-Bit Transparent D-Type Latch with 3-State Outputs 96-LFBGA -40 to 85
SN74LVC32373A 's PackagesSN74LVC32373A 's pdf datasheet
SN74LVC32373AGKER LFBGA
SN74LVC32373AZKER LFBGA




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