3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTSThe LVT16500 are 18-bit universal Bus Transceivers designed for low-voltage (3.3-V) VCC operation, but with
the capability to provide a TTL Interface to a 5-V system environment.
Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),
and Clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when
LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low Logic level. If LEAB is
low, the A-bus data is stored in the latch Flip-Flop on the high-to-low transition of CLKAB. Output-enable OEAB
is active high. When OEAB is high, the B-port outputs are active. When OEAB is low, the B-port outputs are in
the high-impedance state. By Texas Instruments
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Part | Manufacturer | Description | Datasheet | Samples | |
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SN74LVT16500DL | Texas Instruments | LVT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, 0.300 INCH, PLASTIC, SSOP-56 | |||
SN74LVT16500DGGR | Texas Instruments | LVT SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, PLASTIC, TSSOP-56 |
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SN74LVT16500 Pb-Free | SN74LVT16500 Cross Reference | SN74LVT16500 Schematic | SN74LVT16500 Distributor |
SN74LVT16500 Application Notes | SN74LVT16500 RoHS | SN74LVT16500 Circuits | SN74LVT16500 footprint |