25-Bit Configurable Registered Buffer With Address-Parity Test

This 25-bit 1:1 or 14-bit 1:2 configurable registered Buffer is designed for 1.7-V to 1.9-V VCC operation. In the 1:1 pinout configuration, only 1 device per DIMM is required to drive 9 SDRAM loads. In the 1:2 pinout configuration, 2 devices per DIMM are required to drive 18 SDRAM loads.
All inputs are SSTL_18, except the reset (RESET
By Texas Instruments
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SN74SSTU32866AGKER LFBGA
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