The HM-6514/883 is a 1024 x 4 static CMOS RAM fabricated
using self-aligned silicon gate technology. The device
utilizes synchronous circuitry to achieve high performance
and low power operation.
On chip latches are provided for addresses allowing ...
The PCF8570 is a low power static CMOS RAM, organized as 256 words by 8-bits.Addresses and data are transferred serially via a two-line bidirectional bus (IC-bus). The built-in word address register is incremented automatically after each written or read data ...
The FLEx36 family( CYD01S36V
CYD02S36V/CYD04S36V
CYD09S36V/CYD18S36V ) includes 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit, and
18-Mbit pipelined, synchronous, true dual-port static RAMs that
are high-speed, low-power 3.3V CMOS. Two ports are provided,
permitting ...
The FLEx36 family( CYD01S36V CYD02S36V/CYD04S36V CYD09S36V/CYD18S36V ) includes 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit, and 18-Mbit pipelined, synchronous, true dual-port static RAMs that are high-speed, low-power 3.3V CMOS. Two ports are provided, permitting ...
The FLEx36 family( CYD01S36V CYD02S36V/CYD04S36V CYD09S36V/CYD18S36V ) includes 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit, and 18-Mbit pipelined, synchronous, true dual-port static RAMs that are high-speed, low-power 3.3V CMOS. Two ports are provided, permitting ...
The FLEx36 family( CYD01S36V CYD02S36V/CYD04S36V CYD09S36V/CYD18S36V ) includes 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit, and 18-Mbit pipelined, synchronous, true dual-port static RAMs that are high-speed, low-power 3.3V CMOS. Two ports are provided, permitting ...
The FLEx36 family( CYD01S36V CYD02S36V/CYD04S36V CYD09S36V/CYD18S36V ) includes 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit, and 18-Mbit pipelined, synchronous, true dual-port static RAMs that are high-speed, low-power 3.3V CMOS. Two ports are provided, permitting ...
The CY62157ESL is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
,
is ideal for providing More Battery Life, (MoBL ) in portable
applications ...
The CY7C1034DV33 is a high performance CMOS static RAM
organized as 256K words by 24 bits. This device has an
automatic power down feature that significantly reduces power
consumption when deselected. ...
The CY7C1024DV33 is a high performance CMOS static RAM
organized as 128K words by 24 bits. This device has an
automatic power down feature that significantly reduces power
consumption when deselected. ...
The CY7C1012DV33 is a high performance CMOS static RAM
organized as 512K words by 24 bits. Each data byte is separately
controlled by the individual chip selects (CE , CE , and CE ).
1 2 3
CE controls the data on the IO I , while CE controls the
1 0 7 ...
The CY7C1059DV33 is a high performance CMOS Static RAM
organized as 1M words by 8 bits. Easy memory expansion is
provided by an active LOW Chip Enable (CE), an active LOW
Output Enable (OE), and tri-state drivers. To write to the device,
take Chip Enable ...
The CY7C1049DV33 is a high performance CMOS Static RAM
organized as 512K words by 8-bits. Easy memory expansion is
provided by an Active LOW Chip Enable (CE), an Active LOW
Output Enable (OE), and tri-state drivers. You can write to the
device by taking ...
The CY62136FV30 is a high performance CMOS static RAM
organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra low active current.
This is ideal for providing More Battery Life, (MoBL ) in ...
The CY7C1345G is a 128K x 36 synchronous cache RAM
designed to interface with high speed microprocessors with
minimum glue logic. The maximum access delay from clock rise
is 6.5 ns (133 MHz version). A two-bit on-chip counter captures
the first address in ...
The CY7C1353G is a 3.3V, 256K x 18 Synchronous
Flow-through Burst SRAM designed specifically to support
unlimited true back-to-back Read/Write operations without the
insertion of wait states. The CY7C1353G is equipped with the
advanced No Bus Latency, ...
The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined
SRAM designed to support zero-wait-state secondary cache
with minimal glue logic. CY7C1347G IO pins can operate at
either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant
when V = 2.5V. All ...
The CY62157E is a high-performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
,
This is ideal for providing More Battery Life, (MoBL ) in
portable applications such ...
The CY62167DV18 is a high performance CMOS static RAM
organized as 1M words by 16 bits. This device features
advanced circuit design to provide ultra low active current.
,
This is ideal for providing More Battery Life, (MoBL ) in
portable applications ...
The CY62157EV30 is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current.
,
This is ideal for providing More Battery Life, (MoBL ) in
portable applications ...
The CY62157EV18 is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current.
,
This is ideal for providing More Battery Life, (MoBL ) in
portable applications ...
The CY7C1368C SRAM integrates 256K x 32 SRAM cells with
advanced synchronous peripheral circuitry and a two-bit
counter for internal burst operation. All synchronous inputs are
gated by registers controlled by a positive-edge-triggered
Clock Input (CLK). ...
The CY7C1366C/CY7C1367C SRAM integrates 256K x 36
and 512K x 18 SRAM cells with advanced synchronous
peripheral circuitry and a two-bit counter for internal burst
operation. All synchronous inputs are gated by registers
controlled by a ...
The CY7C1365C is a 256K x 32 synchronous cache RAM
designed to interface with high-speed microprocessors with
minimum glue logic. Maximum access delay from clock rise is
6.5 ns (133-MHz version). A 2-bit on-chip counter captures the
first address in a ...
The CY7C1364C SRAM integrates 256K x 32 SRAM cells with
advanced synchronous peripheral circuitry and a two-bit
counter for internal burst operation. All synchronous inputs are
gated by registers controlled by a positive-edge-triggered
Clock Input (CLK). ...
The CY7C1361C/CY7C1363C is a 3.3V, 256K x 36/512K x 18
Synchronous Flow-through SRAMs, respectively designed to
interface with high-speed microprocessors with minimum glue
logic. Maximum access delay from clock rise is 6.5 ns
(133-MHz version). A 2-bit ...
The CY7C1360C/CY7C1362C SRAM integrates 256K x 36
and 512K x 18 SRAM cells with advanced synchronous
peripheral circuitry and a two-bit counter for internal burst
operation. All synchronous inputs are gated by registers
controlled by a ...
The CY7C1355C/CY7C1357C is a 3.3V, 256K x 36/512K x 18
Synchronous Flow-through Burst SRAM designed specifically
to support unlimited true back-to-back Read/Write operations
without the insertion of wait states. The
CY7C1355C/CY7C1357C is equipped with the ...
The CY7C1354CV25 and CY7C1356CV25 are 2.5V, 256K x
36 and 512K x 18 Synchronous pipelined burst SRAMs with
No Bus Latency, (NoBL,) logic, respectively. They are
designed to support unlimited true back-to-back Read/Write
operations with no wait states. The ...
The CY7C1354C and CY7C1356C are 3.3V, 256K x 36 and
512K x 18 Synchronous pipelined burst SRAMs with No Bus
Latency, (NoBL,) logic, respectively. They are designed to
support unlimited true back-to-back Read/Write operations
with no wait states. The ...
The CY7C1292DV18 and CY7C1294DV18 are 1.8V
Synchronous Pipelined SRAMs, equipped with QDR,-II
architecture. QDR-II architecture consists of two separate
ports to access the memory array. The Read port has
dedicated Data Outputs to support Read operations ...
The CY7C1304DV25 is a 2.5V Synchronous Pipelined SRAM
equipped with QDR, architecture. QDR architecture consists
of two separate ports to access the memory array. The Read
port has dedicated Data Outputs to support Read operations
and the Write port has ...
The CY7C1302DV25 is a 2.5V Synchronous Pipelined SRAM
equipped with QDR, architecture. QDR architecture consists
of two separate ports to access the memory array. The Read
port has dedicated data outputs to support Read operations
and the Write Port has ...
The CYK512K16SCCA is a high-performance CMOS pseudo
static RAM (PSRAM) organized as 512K words by 16 bits that
supports an asynchronous memory interface. This device
features advanced circuit design to provide ultra-low active
current. This is ideal for ...
The CY62158DV30 is a high-performance CMOS static RAMs
organized as 1024K words by 8 bits. This device features
advanced circuit design to provide ultra-low active current. ...
The K7D803671B and K7D801871B are 9,437,184 bit Synchronous Pipeline Burst Mode SRAM devices. They are organized as
262,144 words by 36 bits for K7D803671B and 524,288 words by 18 bits for K7D801871B, fabricated using Samsung\'s advanced
CMOS technology. ...
The K7P403622B and K7P401822B are 4,718,592 bit Synchronous Pipeline Mode SRAM devices. They are organized as 131,072
words by 36 bits for K7P403622B and 262,144 words by 18 bits for K7P401822B, fabricated using Samsung\'s advanced CMOS
technology.
Single ...
The K7P403623B and K7P401823B are 4,718,592 bit Synchronous SRAM. It is organized as 131,072 words of 36 bits(or 262,144
words of 18 bits) and is implemented in SAMSUNG\'s advanced CMOS technology.
Single differential PECL level K clocks or single ended or ...
The K7B803625B and K7B801825B are 9,437,184-bit Synchro-
nous Static Random Access Memory designed for high perfor-
mance second level cache of Pentium and Power PC based
System.
It is organized as 256K(512K) words of 36(18) bits and inte-
grates address ...
The K7A803609B and K7A801809B are 9,437,184-bit Syn-
chronous Static Random Access Memory designed for high
performance second level cache of Pentium and Power PC
based System.
It is organized as 256K(512K) words of 36(18) bits and inte-
grates address ...
The K7B803625B and K7B801825B are 9,437,184-bit Synchro-
nous Static Random Access Memory designed for high perfor-
mance second level cache of Pentium and Power PC based
System.
It is organized as 256K(512K) words of 36(18) bits and inte-
grates address ...
The K7A803600B and K7A801800B are 9,437,184-bit Syn-
chronous Static Random Access Memory designed for high
performance second level cache of Pentium and Power PC
based System.
It is organized as 256K(512K) words of 36(18) bits and inte-
grates address ...
The K7A803600B and K7A801800B are 9,437,184-bit Syn-
chronous Static Random Access Memory designed for high
performance second level cache of Pentium and Power PC
based System.
It is organized as 256K(512K) words of 36(18) bits and inte-
grates address ...
The K7N803649B and K7N801849B are 9,437,184 bits Syn-
chronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Memory uti-
lizes all the bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The K7N803649B and K7N801849B are 9,437,184 bits Syn-
chronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Memory uti-
lizes all the bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The K7N803645B and K7N801845B are 9,437,184 bits Syn-
chronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Memory
utilizes all the bandwidth in any combination of operating
cycles.
Address, data inputs, and all control signals except ...
The K7N803645B and K7N801845B are 9,437,184 bits Syn-
chronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Memory
utilizes all the bandwidth in any combination of operating
cycles.
Address, data inputs, and all control signals except ...
The K7N803609B and K7N801809B are 9,437,184 bits
Synchronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Mem-
ory utilizes all the bandwidth in any combination of operat-
ing cycles.
Address, data inputs, and all control signals except ...
The K7N803609B and K7N801809B are 9,437,184 bits
Synchronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Mem-
ory utilizes all the bandwidth in any combination of operat-
ing cycles.
Address, data inputs, and all control signals except ...
The K7N803601B and K7N801801B are
9,437,184 bits Synchronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Memory uti-
lizes all the bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The K7N803601B and K7N801801B are
9,437,184 bits Synchronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Memory uti-
lizes all the bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The K7M803625B and K7M801825B are
9,437,184-bit Synchronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Memory uti-
lizes all bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The K7M803625B and K7M801825B are
9,437,184-bit Synchronous Static SRAMs.
TM
The NtRAM , or No Turnaround Random Access Memory uti-
lizes all bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The IDT70T3719/IDT70T3799M is a high-speed 256K/128K x 72 bit synchro-
nous Dual-Port RAM. The memory array utilizes Dual-Port memory cells
to allow simultaneous access of any address from both ports. Registers on
control, data, and address inputs provide ...
The Hitachi HM628100I Series is 8-Mbit static RAM organized 1,048,576-word ,8-bit. HM628100I Series
has realized higher density, higher performance and low power consumption by employing CMOS process
technology (6-transistor memory cell). It offers low ...
The UD448012 is a high speed, low power, 8,388,608 bits (524,288 words by 16 bits) CMOS static RAM.
The UD448012 has two chip enable pins (/CE1, CE2) to extend the capacity.
The UD448012 is packed in 48-pin PLASTIC TSOP (I) (Normal bent). ...
The UPD4482161 is a 524,288-word by 16-bit, the UPD4482181 is a 524,288-word by 18-bit, the UPD4482321 is a
262,144-word by 32-bit and the UPD4482361 is a 262,144-word by 36-bit synchronous static RAM fabricated with
advanced CMOS technology using ...
The UPD4482162 is a 524,288-word by 16-bit, the UPD4482182 is a 524,288-word by 18-bit, UPD4482322 is a 262,144-
word by 32-bit and the UPD4482362 is a 262,144-word by 36-bit synchronous static RAM fabricated with advanced CMOS
technology using Full-CMOS ...
The UPD4482163 is a 524,288-word by 16-bit, the UPD4482183 is a 524,288-word by 18-bit, UPD4482323 is a 262,144-
word by 32-bit and the UPD4482363 is a 262,144-word by 36-bit synchronous static RAM fabricated with advanced CMOS
technology using Full-CMOS ...
The UPD4481161 is a 524,288-word by 16-bit, the UPD4481181 is a 524,288-word by 18-bit, the UPD4481321 is a
262,144-word by 32-bit and the UPD4481361 is a 262,144-word by 36-bit ZEROSB static RAM fabricated with
advanced CMOS technology using full CMOS ...
The UPD4481162 is a 524,288-word by 16-bit, the UPD4481182 is a 524,288-word by 18-bit, the UPD4481322 is a
262,144-word by 32-bit and the UPD4481362 is a 262,144-word by 36-bit ZEROSB static RAM fabricated with
advanced CMOS technology using full CMOS ...
The ISSI IS62C51216AL and IS65C51216AL are high-
speed, 8M bit static RAMs organized as 512K words by 16
bits. It is fabricated using ISSI\'s high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit ...
The ISSI IS61WV51216ALL
IS61WV51216BLL
IS64WV51216BLL
are high-speed, 8M-bit static RAMs organized as 512K
words by 16 bits. It is fabricated using ISSI\\\'s high-perform-
ance CMOS technology. This highly reliable process coupled
with innovative ...
The ISSI IS61WV10248ALL
IS61WV10248BLL
IS64WV10248BLL
are very high-speed, low power, 1M-word by 8-bit CMOS
static RAM. The IS61WV10248ALL/BLL and
IS64WV10248BLL are fabricated using ISSI\'s high-
performance CMOS technology. This highly ...
The ISSI IS61WV25632ALS
IS61WV25632BLS
IS64WV25632BLS
are high-speed, 8M-bit static RAMs organized as 256K
words by 32 bits. It is fabricated using ISSI\'s high-per-
formance CMOS technology. This highly reliable process
coupled with innovative ...
The ISSI IS62WV51216ALL/ IS62WV51216BLL are high-
speed, 8M bit static RAMs organized as 512K words by 16
bits. It is fabricated using ISSI\'s high-performance CMOS
technology. This highly reliable process coupled with innovative
circuit design ...
The ISSI IS66WV51216ALL
IS66WV51216BLL is a high-speed, 8M
bit static RAMs organized as 512K words by 16 bits. It is
fabricated using ISSI\'s high-performance CMOS technology.
This highly reliable process coupled with ...
The ISSI IS66WV25632ALL
IS66WV25632BLL is a high-speed, 8M
bit static RAMs organized as 256K words by 32 bits. It is
fabricated using ISSI\'s high-performance CMOS technology.
This highly reliable process coupled with ...
The ISSI IS61LPS/VPS25636A, IS64LPS25636A and
IS61LPS/VPS51218A are high-speed, low-power syn-
chronous static RAMs designed to provide burstable, high-
performance memory for communication and networking
applications. The IS61LPS/VPS25636A ...
The ISSI IS61VPD25636A IS61LPD25636A
IS61VPD51218A IS61LPD51218A
are high-speed, low-power synchronous static RAMs de-
signed to provide burstable, high-performance memory for
communication and networking applications. The IS61LPD/
VPD25636A is ...
The ISSI IS61LF25636A IS61VF25636A
IS61LF51218A IS61VF51218A are
high-speed, low-power synchronous static RAMs designed
to provide burstable, high-performance memory for commu-
nication and networking applications. The IS61LF/
VF25636A is organized ...
256K x 36 and 512K x 18
9Mb, FLOW THROUGH \'NO WAIT\'
STATE BUS SRAM , IS61NLF25636A The 9 Meg \'NLF/NVF\' product family feature high-speed,
low-power synchronous static RAMs designed to provide
a burstable, high-performance, \'no wait\' state, device ...
The 18 Meg \'NLF/NVF\' product family feature high-speed,
low-power synchronous static RAMs IS61NLF25672/IS61NVF25672
IS61NLF51236/IS61NVF51236
IS61NLF102418/IS61NVF102418 designed to provide
a burstable, high-performance, \'no wait\' state, device ...
The BH62UV8001 is a high performance, ultra low power CMOS
Static Random Access Memory organized as 1,048,576 by 8 bits
and operates in a wide range of 1.65V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques ...
The LP62E16512-T is a low operating current 8,388,608-bit
static random access memory organized as 524,288 words
by 16 bits and operates on low power voltage from 1.65V to
2.2V. It is built using AMIC\'s high performance CMOS
process.
Inputs and ...
The LP62S16512-T is a low operating current 8,388,608-bit
static random access memory organized as 524,288 words
by 16 bits and operates on low power voltage from 2.7V to
3.6V. It is built using AMIC\'s high performance CMOS
process. ...
The A67L9318, A67L8336 SRAMs integrate a 512K X 18,
256K X 36 SRAM core with advanced synchronous
peripheral circuitry and a 2-bit burst counter. These SRAMs
are optimized for 100 percent bus utilization without the
insertion of any wait cycles ...
The A67L93181, A67L83361 SRAMs integrate a 512K X
18, 256K X 36 SRAM core with advanced synchronous
peripheral circuitry and a 2-bit burst counter. These SRAMs
are optimized for 100 percent bus utilization without the
insertion of any wait cycles ...
The A63P83361 is a high-speed SRAM containing 9M
bits of bit synchronous memory, organized as 256K
words by 36 bits.
The A63P83361 combines advanced synchronous
peripheral circuitry, 2-bit burst control, input registers,
output buffer and a 256K X ...
The A63P8336 is a high-speed SRAM containing 9M bits
of bit synchronous memory, organized as 256K words by
36 bits.
The A63P8336 combines advanced synchronous
peripheral circuitry, 2-bit burst control, input registers,
output registers and a 256KX36 ...
The K6F8016R6B families are fabricated by SAMSUNGs
advanced full CMOS process technology. The families support
industrial operating temperature ranges and have chip scale
package for user flexibility of system design. The families also
support low data ...
The K6X8008C2B families are fabricated by SAMSUNGs
advanced full CMOS process technology. The families sup-
port various operating temperature range for user flexibility of
system design. The families also support low data retention
voltage for battery ...
The K6X8008T2B families are fabricated by SAMSUNGs
advanced full CMOS process technology. The families sup-
port various operating temperature range for user flexibility of
system design. The families also support low data retention
voltage for battery ...
The K6X8016C3B families are fabricated by SAMSUNGs
advanced full CMOS process technology. The families support
various operating temperature range for user flexibility of sys-
tem design. The families also support low data retention voltage
for battery ...
The K7A803609A and K7A801809A are 9,437,184-bit Syn-
chronous Static Random Access Memory designed for high
performance second level cache of Pentium and Power PC
based System. ...
The K7A803600M and K7A801800M are 9,437,184-bit Syn-
chronous Static Random Access Memory designed for high
performance second level cache of Pentium and Power PC
based System. ...
The K7B803625M and K7B801825M are 9,437,184-bit Syn-
chronous Static Random Access Memory designed for high
performance second level cache of Pentium and Power PC
based System.
The K7B803625M and K7B801825M are fabricated using SAM-
SUNGs high ...
The K7M163625M and K7M161825M are 18,874,368-bits Syn-
chronous Static SRAMs.
The NtRAMTM, or No Turnaround Random Access Memory uti-
lizes all bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The K7M803625A and K7M801825A are 9,437,184-bit Syn-
chronous Static SRAMs.
The NtRAMTM, or No Turnaround Random Access Memory uti-
lizes all bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The K7N163601M and K7N161801M are 18,874,368-bits Syn-
chronous Static SRAMs.
The NtRAMTM, or No Turnaround Random Access Memory uti-
lizes all the bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The K7N803645M and K7N801845M are 9,437,184 bits Syn-
chronous Static SRAMs.
The NtRAMTM, or No Turnaround Random Access Memory uti-
lizes all the bandwidth in any combination of operating cycles.
Address, data inputs, and all control signals except ...
The K7P803611M and K7P801811M are 9,437,184 bit Synchronous Pipeline Mode SRAM. It is organized as 262,144 words of 36
bits(or 524,288 words of 18 bits)and is implemented in SAMSUNGs advanced CMOS technology.
Single differential HSTL level K clocks are used ...
The ISSI IS61LV10248 is a very high-speed, low power,
1M-word by 8-bit CMOS static RAM. The IS61LV10248 is
fabricated using ISSI\'s high-performance CMOS technol-
ogy. This highly reliable process coupled with innovative
circuit design techniques, yields ...
The ISSI IS61LV51216
IS64LV51216 is a high-speed, 8M-bit static
RAM organized as 525,288 words by 16 bits. It is fabricated
using ISSI\'s high-performance CMOS technology. This
highly reliable process coupled with innovative circuit de-
sign ...
The HY62SF16804B is a high speed, super low
power and 8Mbit full CMOS SRAM organized as
512K words by 16bits. The HY62SF16804B uses
high performance full CMOS process technology
and is designed for high speed and low power
circuit technology. It is ...