• Product pinout
  • Description
  • HM-6514,1024x4 CMOS RAM
  • The HM-6514/883 is a 1024 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. The device utilizes synchronous circuitry to achieve high performance and low power operation. On chip latches are provided for addresses allowing ...
  • CYD04S36V,32K/64K/128K/256K/512 X 36 Synchronous Dual-Port RAM
  • The FLEx36 family( CYD01S36V CYD02S36V/CYD04S36V CYD09S36V/CYD18S36V ) includes 1-Mbit, 2-Mbit, 4-Mbit, 9-Mbit, and 18-Mbit pipelined, synchronous, true dual-port static RAMs that are high-speed, low-power 3.3V CMOS. Two ports are provided, permitting ...
  • CY62157ESL,8-Mbit (512K X 16) Static RAM
  • The CY62157ESL is a high performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This , is ideal for providing More Battery Life, (MoBL ) in portable applications ...
  • CY7C1034DV33,6-Mbit (256K X 24) Static RAM
  • The CY7C1034DV33 is a high performance CMOS static RAM organized as 256K words by 24 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected. ...
  • CY7C1024DV33,3-Mbit (128K X 24) Static RAM
  • The CY7C1024DV33 is a high performance CMOS static RAM organized as 128K words by 24 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected. ...
  • CY7C1012DV33,12-Mbit (512K X 24) Static RAM
  • The CY7C1012DV33 is a high performance CMOS static RAM organized as 512K words by 24 bits. Each data byte is separately controlled by the individual chip selects (CE , CE , and CE ). 1 2 3 CE controls the data on the IO I , while CE controls the 1 0 7 ...
  • CY7C1059DV33,8-Mbit (1M X 8) Static RAM
  • The CY7C1059DV33 is a high performance CMOS Static RAM organized as 1M words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. To write to the device, take Chip Enable ...
  • CY7C1049DV33,4-Mbit (512K X 8) Static RAM
  • The CY7C1049DV33 is a high performance CMOS Static RAM organized as 512K words by 8-bits. Easy memory expansion is provided by an Active LOW Chip Enable (CE), an Active LOW Output Enable (OE), and tri-state drivers. You can write to the device by taking ...
  • CY62136FV30,2-Mbit (128K X 16) Static RAM
  • The CY62136FV30 is a high performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life, (MoBL ) in ...
  • CY7C1345G,4-Mbit (128K X 36) Flow Through Sync SRAM
  • The CY7C1345G is a 128K x 36 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic. The maximum access delay from clock rise is 6.5 ns (133 MHz version). A two-bit on-chip counter captures the first address in ...
  • CY7C1347G,4-Mbit (128K X 36) Pipelined Sync SRAM
  • The CY7C1347G is a 3.3V, 128K x 36 synchronous-pipelined SRAM designed to support zero-wait-state secondary cache with minimal glue logic. CY7C1347G IO pins can operate at either the 2.5V or the 3.3V level; the IO pins are 3.3V tolerant when V = 2.5V. All ...
  • CY62157E,8-Mbit (512K X 16) Static RAM
  • The CY62157E is a high-performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. , This is ideal for providing More Battery Life, (MoBL ) in portable applications such ...
  • CY62167DV18,16-Mbit (1M X 16) Static RAM
  • The CY62167DV18 is a high performance CMOS static RAM organized as 1M words by 16 bits. This device features advanced circuit design to provide ultra low active current. , This is ideal for providing More Battery Life, (MoBL ) in portable applications ...
  • CY62157EV30,8-Mbit (512K X 16) Static RAM
  • The CY62157EV30 is a high performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra low active current. , This is ideal for providing More Battery Life, (MoBL ) in portable applications ...
  • CY62157EV18,8-Mbit (512K X 16) Static RAM
  • The CY62157EV18 is a high performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra low active current. , This is ideal for providing More Battery Life, (MoBL ) in portable applications ...
  • CY7C1368C,9-Mbit (256K X 32) Pipelined DCD Sync SRAM
  • The CY7C1368C SRAM integrates 256K x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). ...
  • CY7C1365C,9-Mbit (256K X 32) Flow-Through Sync SRAM
  • The CY7C1365C is a 256K x 32 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a ...
  • CY7C1364C,9-Mbit (256K X 32) Pipelined Sync SRAM
  • The CY7C1364C SRAM integrates 256K x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). ...
  • CY7C1363C,9-Mbit (256K X 36/512K X 18) Flow-Through SRAM
  • The CY7C1361C/CY7C1363C is a 3.3V, 256K x 36/512K x 18 Synchronous Flow-through SRAMs, respectively designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit ...
  • CY7C1362C,9-Mbit (256K X 36/512K X 18) Pipelined SRAM
  • The CY7C1360C/CY7C1362C SRAM integrates 256K x 36 and 512K x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a ...
  • CY7C1294DV18,9-Mbit QDR- II? SRAM 2-Word Burst Architecture
  • The CY7C1292DV18 and CY7C1294DV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR,-II architecture. QDR-II architecture consists of two separate ports to access the memory array. The Read port has dedicated Data Outputs to support Read operations ...
  • CY7C1304DV25,CY7C1307BV25
  • The CY7C1304DV25 is a 2.5V Synchronous Pipelined SRAM equipped with QDR, architecture. QDR architecture consists of two separate ports to access the memory array. The Read port has dedicated Data Outputs to support Read operations and the Write port has ...
  • CYK512K16SCCA,8-Mbit (512K X 16) Pseudo Static RAM
  • The CYK512K16SCCA is a high-performance CMOS pseudo static RAM (PSRAM) organized as 512K words by 16 bits that supports an asynchronous memory interface. This device features advanced circuit design to provide ultra-low active current. This is ideal for ...
  • K7D803671B,8M DDR SYNCHRONOUS SRAM
  • The K7D803671B and K7D801871B are 9,437,184 bit Synchronous Pipeline Burst Mode SRAM devices. They are organized as 262,144 words by 36 bits for K7D803671B and 524,288 words by 18 bits for K7D801871B, fabricated using Samsung\'s advanced CMOS technology. ...
  • K7P403622B,128Kx36 & 256Kx18 Synchronous Pipelined SRAM
  • The K7P403622B and K7P401822B are 4,718,592 bit Synchronous Pipeline Mode SRAM devices. They are organized as 131,072 words by 36 bits for K7P403622B and 262,144 words by 18 bits for K7P401822B, fabricated using Samsung\'s advanced CMOS technology. Single ...
  • K7P401823B,128Kx36 & 256Kx18 Synchronous Pipelined SRAM
  • The K7P403623B and K7P401823B are 4,718,592 bit Synchronous SRAM. It is organized as 131,072 words of 36 bits(or 262,144 words of 18 bits) and is implemented in SAMSUNG\'s advanced CMOS technology. Single differential PECL level K clocks or single ended or ...
  • K7B803625B,256Kx36 & 512Kx18-Bit Synchronous Burst SRAM
  • The K7B803625B and K7B801825B are 9,437,184-bit Synchro- nous Static Random Access Memory designed for high perfor- mance second level cache of Pentium and Power PC based System. It is organized as 256K(512K) words of 36(18) bits and inte- grates address ...
  • K7B801825B,256Kx36 & 512Kx18-Bit Synchronous Burst SRAM
  • The K7B803625B and K7B801825B are 9,437,184-bit Synchro- nous Static Random Access Memory designed for high perfor- mance second level cache of Pentium and Power PC based System. It is organized as 256K(512K) words of 36(18) bits and inte- grates address ...
  • K7N803649B,256Kx36 & 512Kx18-Bit Pipelined NtRAM
  • The K7N803649B and K7N801849B are 9,437,184 bits Syn- chronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Memory uti- lizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7N801849B,256Kx36 & 512Kx18-Bit Pipelined NtRAM
  • The K7N803649B and K7N801849B are 9,437,184 bits Syn- chronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Memory uti- lizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7N803645B,256Kx36 & 512Kx18-Bit Pipelined NtRAM
  • The K7N803645B and K7N801845B are 9,437,184 bits Syn- chronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Memory utilizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7N801845B,256Kx36 & 512Kx18-Bit Pipelined NtRAM
  • The K7N803645B and K7N801845B are 9,437,184 bits Syn- chronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Memory utilizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7N803609B,256Kx36 & 512Kx18-Bit Pipelined NtRAM
  • The K7N803609B and K7N801809B are 9,437,184 bits Synchronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Mem- ory utilizes all the bandwidth in any combination of operat- ing cycles. Address, data inputs, and all control signals except ...
  • K7N801809B,256Kx36 & 512Kx18-Bit Pipelined NtRAM
  • The K7N803609B and K7N801809B are 9,437,184 bits Synchronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Mem- ory utilizes all the bandwidth in any combination of operat- ing cycles. Address, data inputs, and all control signals except ...
  • K7N803601B,256Kx32 & 256Kx36 & 512Kx18-Bit Pipelined NtRAM
  • The K7N803601B and K7N801801B are 9,437,184 bits Synchronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Memory uti- lizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7N801801B,256Kx32 & 256Kx36 & 512Kx18-Bit Pipelined NtRAM
  • The K7N803601B and K7N801801B are 9,437,184 bits Synchronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Memory uti- lizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7M803625B,256Kx36 & 512Kx18-Bit Flow Through NtRAM
  • The K7M803625B and K7M801825B are 9,437,184-bit Synchronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Memory uti- lizes all bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7M801825B,256Kx36 & 512Kx18-Bit Flow Through NtRAM
  • The K7M803625B and K7M801825B are 9,437,184-bit Synchronous Static SRAMs. TM The NtRAM , or No Turnaround Random Access Memory uti- lizes all bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • 70T3799M,128K X 72 Sync, 3.3V/2.5V Dual-Port
  • The IDT70T3719/IDT70T3799M is a high-speed 256K/128K x 72 bit synchro- nous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide ...
  • UPD4481161,TM 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
  • The UPD4481161 is a 524,288-word by 16-bit, the UPD4481181 is a 524,288-word by 18-bit, the UPD4481321 is a 262,144-word by 32-bit and the UPD4481361 is a 262,144-word by 36-bit ZEROSB static RAM fabricated with advanced CMOS technology using full CMOS ...
  • UPD4481162,TM 8M-BIT ZEROSB SRAM PIPELINED OPERATION
  • The UPD4481162 is a 524,288-word by 16-bit, the UPD4481182 is a 524,288-word by 18-bit, the UPD4481322 is a 262,144-word by 32-bit and the UPD4481362 is a 262,144-word by 36-bit ZEROSB static RAM fabricated with advanced CMOS technology using full CMOS ...
  • IS61WV10248ALL,1M X 8 HIGH-SPEED CMOS STATIC RAM
  • The ISSI IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL are very high-speed, low power, 1M-word by 8-bit CMOS static RAM. The IS61WV10248ALL/BLL and IS64WV10248BLL are fabricated using ISSI\'s high- performance CMOS technology. This highly ...
  • LP62E16512,512K X 16 BIT LOW VOLTAGE CMOS SRAM
  • The LP62E16512-T is a low operating current 8,388,608-bit static random access memory organized as 524,288 words by 16 bits and operates on low power voltage from 1.65V to 2.2V. It is built using AMIC\'s high performance CMOS process. Inputs and ...
  • LP62S16512,512K X 16 BIT LOW VOLTAGE CMOS SRAM
  • The LP62S16512-T is a low operating current 8,388,608-bit static random access memory organized as 524,288 words by 16 bits and operates on low power voltage from 2.7V to 3.6V. It is built using AMIC\'s high performance CMOS process. ...
  • A67L8336,512K X 18, 256K X 36 LVTTL, Pipelined ZeBLTM SRAM
  • The A67L9318, A67L8336 SRAMs integrate a 512K X 18, 256K X 36 SRAM core with advanced synchronous peripheral circuitry and a 2-bit burst counter. These SRAMs are optimized for 100 percent bus utilization without the insertion of any wait cycles ...
  • K6X8008C2B,1mx8 Bit Low Power And Low Voltage Cmos Static Ram
  • The K6X8008C2B families are fabricated by SAMSUNGs advanced full CMOS process technology. The families sup- port various operating temperature range for user flexibility of system design. The families also support low data retention voltage for battery ...
  • K6X8008T2B,Cmos Sram Semiconductor
  • The K6X8008T2B families are fabricated by SAMSUNGs advanced full CMOS process technology. The families sup- port various operating temperature range for user flexibility of system design. The families also support low data retention voltage for battery ...
  • K7B801825M,256kx36 & 512kx18 Synchronous Sram Semiconductor
  • The K7B803625M and K7B801825M are 9,437,184-bit Syn- chronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System. The K7B803625M and K7B801825M are fabricated using SAM- SUNGs high ...
  • K7M161825M,512kx36 & 1mx18 Flow-through Ntram-tm
  • The K7M163625M and K7M161825M are 18,874,368-bits Syn- chronous Static SRAMs. The NtRAMTM, or No Turnaround Random Access Memory uti- lizes all bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7M801825A,256kx36 & 512kx18 Flow-through Ntram Tm
  • The K7M803625A and K7M801825A are 9,437,184-bit Syn- chronous Static SRAMs. The NtRAMTM, or No Turnaround Random Access Memory uti- lizes all bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7N161801M,512kx36 & 1mx18-bit Pipelined Ntram Tm
  • The K7N163601M and K7N161801M are 18,874,368-bits Syn- chronous Static SRAMs. The NtRAMTM, or No Turnaround Random Access Memory uti- lizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except ...
  • K7P801811M,256kx36 & 512kx18 Sram Semiconductor
  • The K7P803611M and K7P801811M are 9,437,184 bit Synchronous Pipeline Mode SRAM. It is organized as 262,144 words of 36 bits(or 524,288 words of 18 bits)and is implemented in SAMSUNGs advanced CMOS technology. Single differential HSTL level K clocks are used ...
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