The SY10E445 SY100E445 are integrated 4-bit serial-to-parallel Data Converters The devices are designed to operate for NRZ data rates of up to 2.5Gb/s. The chip generates a divide-by-4 and a divide-by-8 Clock for both 4-bit conversion and a two-chip 8-bit conversion function. The conversion sequence was chosen to convert the first serial bit to Q0, the second to Q1, etc. Two selectable serial inputs provide a loopback capability for testing purposes when the device is used in conjunction with the E446 parallel-to-serial converter. The start bit for conversion CAN be moved using the SYNC input. A single pulse, applied asynchronously for at least two input Clock cycles, shifts the start bit for conversion from Qn to Qn-1 by one bit. For each additional shift required, an additional pulse must be applied to the SYNC input. Asserting the SYNC input will force the internal Clock dividers to "swallow" a Clock pulse, effectively shifting a bit from the Qn to the Qn-1 output (see Timing Diagram B). By Micrel Semiconductor
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SY100E445 Pinout, Pinouts
SY100E445 pinout,Pin out
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