SY100S351 HEX D FLIP-FLOP

The SY100S351 offers six D-type, edge-triggered, master/slave Flip-Flops with differential outputs, and is designed for use in high-performance ECL systems. The Flip-Flops are controlled by the signal from the logical OR operation on a pair of common Clock signals (CPa, CPb). Data enters the master when both CPa and CPb are LOW and transfers to the slave when either CPa or CPb (or both) go to a Logic HIGH. The Master Reset (MR) input overrides all other inputs and takes the Q outputs to a Logic LOW. The inputs on this device have 75k, pull-down resistors. By Micrel Semiconductor
SY100S351 's PackagesSY100S351 's pdf datasheet
SY100S351JC
SY100S351JCTR
SY100S351JZ
SY100S351JZTR




SY100S351 Pinout, Pinouts
SY100S351 pinout,Pin out
This is one package pinout of SY100S351,If you need more pinouts please download SY100S351's pdf datasheet.

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