SY100S360 DUAL PARITY CHECKER/GENERATOR

The SY100S360 is a dual parity checker/generator and is designed for use in high-performance ECL systems. The inputs are segmented into two groups of nine inputs each and the parity output is at a Logic LOW when an even number of inputs are at a Logic HIGH. In each group, one of the nine inputs (Ia, Ib) has a shorter propagation delay and, therefore, is ideal as the expansion input for parity generation of wider data. By Micrel Semiconductor
Part Manufacturer Description Datasheet Samples
SY100S360JZTR Microchip Technology Inc 100S SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PQCC28, LEAD FREE, PLASTIC, LCC-28
SY100S360JC Microchip Technology Inc Parity Generator/Checker, 100S Series, 9-Bit, True Output, ECL, PQCC28
SY100S360JZ-TR Microchip Technology Inc 100S SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PQCC28
SY100S360JC-TR Microchip Technology Inc 100S SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PQCC28
SY100S360FC-TR Microchip Technology Inc PARITY GENERATOR/CHECKER
SY100S360DC Microchip Technology Inc Parity Generator/Checker, 100S Series, 16-Bit, Inverted Output, ECL, CDIP24, 0.400 INCH, CERDIP-24
SY100S360JZ Microchip Technology Inc 100S SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PQCC28
SY100S360 's PackagesSY100S360 's pdf datasheet



SY100S360 Pinout, Pinouts
SY100S360 pinout,Pin out
This is one package pinout of SY100S360,If you need more pinouts please download SY100S360's pdf datasheet.

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