SY100S839V ÷2/4, ÷4/5/6 CLOCK GENERATION CHIP

The SY100S839V is a low skew ,/4, ,/5/6 Clock generation chip designed explicitly for low skew Clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device CAN be driven by either a differential or single-ended ECL/LVECL or, if positive power supplies are used, PECL/LVPECL input signal. In addition, by using the VBB output, a sinusoidal source CAN be AC-coupled into the device. If a single- ended input is to be used, the VBB output should be connected to the /CLK input and bypassed to ground via a 0.01 capacitor. The VBB output is designed to act as the switching reference for the input of the S839V under single-ended input conditions. As a result, this pin CAN only source/sink up to 0.5mA of current. By Micrel Semiconductor
SY100S839V 's PackagesSY100S839V 's pdf datasheet
SY100S839VZC
SY100S839VZCTR
SY100S839VZG
SY100S839VZGTR




SY100S839V Pinout, Pinouts
SY100S839V pinout,Pin out
This is one package pinout of SY100S839V,If you need more pinouts please download SY100S839V's pdf datasheet.

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