SY10E156JC SY10E156JCTR SY100E156JC SY100E156JCTR 3-BIT 4:1 MUX-LATCH

The SY10E156 SY100E156 offer three 4:1 multiplexers followed by Latches with differential outputs, designed for use in new, high-performance ECL systems. The two external latch enable signals (LEN1 and LEN2) are gated through a logical OR operation before use as control for the three Latches When both LEN1 and LEN2 are at a Logic LOW, the Latches are transparent, thus presenting the data from the multiplexers at the output pins. If either LEN1 or LEN2 (or both) are at a Logic HIGH, the outputs are latched. By Micrel Semiconductor
Part Manufacturer Description Datasheet Samples
SY10E156JC Microchip Technology Inc D Latch, 10E Series, 1-Func, Low Level Triggered, 3-Bit, Complementary Output, ECL, PQCC28
SY10E156JC 's PackagesSY10E156JC 's pdf datasheet
SY10E156JCTR
SY100E156JC
SY100E156JCTR




SY10E156JC Pinout, Pinouts
SY10E156JC pinout,Pin out
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