SY89825U 2.5/3.3V 1:22 High-Performance, Low Voltage PECL Bus Clock Driver & Translator With Internal Terminator

The SY89825U is a High Performance Bus Clock Driver with 22 differential LVPECL output pairs. This part is designed for use in low voltage (2.5V, 3.3V) applications which require a large number of outputs to drive precisely aligned, ultra low skew signals to their destination. The input is multiplexed from either LVDs or LVPECL by the CLK_SEL pin. The LVDs input includes a 100W internal termination, thus eliminating the need for external termination. The Output Enable (OE) is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This eliminates any chance of generating a runt Clock pulse when the device is enabled/disabled as CAN happen with an asynchronous control. By Micrel Semiconductor
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SY89825U Pinout, Pinouts
SY89825U pinout,Pin out
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