SY89875U 2.5V, 2.0GHz ANY DIFF. IN-TO-LVDSPROGRAMMABLE CLOCK DIVIDER AND 1:2 FANOUT BUFFER W/ INTERNAL TERMINATION

This low-skew, low-jitter device is capable of accepting a high-speed (e.g., 622MHz or higher) CML, LVPECL, LVDs or HSTL Clock input signal and dividing down the frequency using a programmable divider to create a lower speed version of the input Clock Available divider ratios are 2, 4, 8 and 16, or straight pass-through. By Micrel Semiconductor
SY89875U 's PackagesSY89875U 's pdf datasheet
SY89875UMI MLF
SY89875UMITR MLF
SY89875UMG MLF
SY89875UMGTR MLF




SY89875U Pinout, Pinouts
SY89875U pinout,Pin out
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