64K X 64 SRAM

The T35L6464A SRAM integrates 65536 x 64 SRAM cells with advanced synchronous peripheral circuitry and a 2-bit Counter for internal burst operation. All synchronous inputs are gated by Registers controlled by a positive-edge-triggered Clock input (CLK). The synchronous inputs include all addresses, all data inputs, three active LOW chip enable (CE ,CE2 and CE3 ), two additional chip enables (CE2 and CE3) , burst control inputs By TM Technology Inc.
T35L6464A 's PackagesT35L6464A 's pdf datasheet
T35L6464A-5Q
T35L6464A-5L




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