Low Power 1m (128kx8)-bits Static Ram

The T68K1M T68S1M and T68R1M device family is a low power and high performance CMOS SRAM organized as 131,072 words by 8 bits. It operates from 2.7V to 3.6V, 2.2V to 2.7V, and 1.65V to 2.2V. Easy memory expansion is provided by an active LOW chip enable 1 (/CE1), active HIGH chp enable 2 (CE2) and active LOW output enable (/OE) and three-state I/O drivers. Four control pins (/CE1, CE2, /OE, and /WE) fully control the operation mode of the T68 K/S/R 1M device family. An active LOW write enable signal (/WE active low) controls the write/read operation of the memory. When /CE1 and /WE inputs go LOW and CE2 input goes HIGH simultaneously, the device is in write mode and data on the 8 data pins (IO1~IO8) is written into the memory location specified by the address on address pins (A0~A16). When /CE1 and /OE inputs go LOW and CE2 and /WE input stay in HIGH state, the device is in read mode and data in the specified memory address is driven onto the 8 data pins. The 8 data pins will be in high-impedance state if both /OE and /WE pins are in HIGH (inactive) state. The T68 K/S/R 1M device family has an automatically power-down feature when the chip is deselected (/CE1 pin HIGH or CE2 pin LOW). The T68 K/S/R 1M device family is available in JEDEC standard 32-pin 450-mil SOP, 32-pin 8mmx20mm plastic TSOP, 32-pin 8mmx13.4mm plastic STSOP, and 36-ball 6mmx8mm BGA package, also for DICE. By Unkown
T68K1M 's PackagesT68K1M 's pdf datasheet

T68K1M Pinout, Pinouts
T68K1M pinout,Pin out
This is one package pinout of T68K1M,If you need more pinouts please download T68K1M's pdf datasheet.

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