8-Bit Addressable Latch

This power Logic 8-bit addressable latch controls open-drain DMOS-transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses include working Registers serial-holding Registers and decoders or demultiplexers. This is a multi-functional device capable of operating as eight addressable Latches or an 8-line demultiplexer with active-low DMOS outputs. Each open-drain DMOS Transistor features an independent chopping current-limiting circuit to prevent damage in the case of a short circuit.
Four distinct modes of operation are selectable by controlling the clear (CLR) and enable (G) inputs as enumerated in the function table. In the addressable-latch mode, data at the data-in (D) terminal is written into the addressed latch. The addressed DMOS-transistor output inverts the data input with all unaddressed DMOS-transistor outputs remaining in their previous states. In the memory mode, all DMOS-transistor outputs remain in their previous states and are unaffected by the data or address inputs. To eliminate the possibility of entering erroneous data in the latch, enable G should be held high (inactive) while the address lines are changing. In the 8-line demultiplexing mode, the addressed output is inverted with respect to the D input and all other outputs are high. In the clear mode, all outputs are high and unaffected by the address and data inputs.
Separate power ground (PGND) and Logic ground (LGND) terminals are provided to facilitate maximum system flexibility. All PGND terminals are internally connected, and each PGND terminal must be externally connected to the power system ground in order to minimize parasitic impedance. A single-point connection between LGND and PGND must be made externally in a manner that reduces crosstalk between the Logic and load circuits.
The TPIC6A259 is offered in a thermally-enhanced dual-in-line (NE) package and a wide-body, surface-mount (DW) package. The TPIC6A259 is characterized for operation over the operating case temperature range of -40C to 125C.
By Texas Instruments
Part Manufacturer Description Datasheet Samples
TPIC6A259DW Texas Instruments 8-bit addressable latch 24-SOIC -40 to 125
TPIC6A259DWG4 Texas Instruments 8-bit addressable latch 24-SOIC -40 to 125
TPIC6A259DWRG4 Texas Instruments 8-bit addressable latch 24-SOIC -40 to 125
TPIC6A259NE Texas Instruments 8-bit addressable latch 20-PDIP -40 to 125
TPIC6A259 's PackagesTPIC6A259 's pdf datasheet
TPIC6A259DW SOIC
TPIC6A259DWG4 SOIC
TPIC6A259DWR SOIC
TPIC6A259DWRG4 SOIC




TPIC6A259 Pinout, Pinouts
TPIC6A259 pinout,Pin out
This is one package pinout of TPIC6A259,If you need more pinouts please download TPIC6A259's pdf datasheet.

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