Single-Chip TDMoIP/MPLS Gateway Solution

PacketTrunk-4 is a TDMoIP/MPLS gateway device that transparently transports TDM trunks over IP/MPLS networks using the world's most popular standard for circuit emulation over IP/MPLS. The single-chip device includes robust Clock recovery, encapsulation, jitter compensation, QoS support, and standards support for transport of structured and unstructured TDM signals over a packet-switched network (PSN). This packet processor serves as a building block for TDM over IP, TDM over MPLS, or TDM over switched Ethernet systems. PacketTrunk-4's DPLL-based quad adaptive Clock recovery block provides rapid frequency lock and highly accurate phase tracking. The block provides standards-compliant jitter and wander performance under real world PSN conditions by reconstructing the TDM Clock based solely on inter-packet arrival time and jitter Buffer fill level. During phase tracking, the chip optimizes jitter Buffer levels to minimize latency. The payload machine implements Constant Bit Rate (CBR) for circuit emulation, Variable Bit Rate (VBR) for loop emulation, and HDLC for efficient transfer or termination of frame-based traffic. Payload size is selectable over a wide range, giving end users maximum tradeoff flexibility between latency and overhead. PacketTrunk-4 is a highly-integrated ASIC designed for use in a wide variety of network access/edge applications that provides a scalable single-chip to multi-chip solution. By TranSwitch Corporation
TXC-05870 's PackagesTXC-05870 's pdf datasheet

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TXC-05870 Application circuits
TXC-05870 circuits
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