Dual J-K Flip-Flops

The UT54ACS109E is a dual J-K positive triggered Flip-Flop A low level at the preset or clear inputs sets or resets the outputs regardless of the other input levels. When preset and clear are inactive (high), data at the J and K input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the Clock pulse. Following the hold time interval, data at the J and K input CAN be changed without affecting the levels at the outputs. The Flip-Flops CAN perform as toggle Flip-Flops by grounding K and tying J high. They also CAN perform as D Flip-Flops if J and K are tied together. By Aeroflex Circuit Technology
UT54ACS109E 's PackagesUT54ACS109E 's pdf datasheet



UT54ACS109E Pinout, Pinouts
UT54ACS109E pinout,Pin out
This is one package pinout of UT54ACS109E,If you need more pinouts please download UT54ACS109E's pdf datasheet.

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