Xc1800 Series Of In-system Programmable Configuration Proms ,

Xilinx introduces the XC1800 series of in-system program- mable configuration PROMs. Initial devices in this 3.3V family are a 4 megabit, a 2 megabit, a 1 megabit, a 512 Kbit, a 256 Kbit, and a 128 Kbit PROM that provide an easy-to-use, cost-effective method for re-programming and storing large Xilinx FPGA or CPLD configuration bit- streams. When the FPGA is in Master Serial mode, it generates a configuration Clock that drives the PROM. A short access time after the rising CCLK, data is available on the PROM DATA (D0) pin that is connected to the FPGA DIN pin. The FPGA generates the appropriate number of Clock pulses to complete the configuration. When the FPGA is in Slave Serial mode, the PROM and the FPGA are clocked by an external Clock By Xilinx Corp.
XC1800 's PackagesXC1800 's pdf datasheet
XC1804VQ44C
XC1802VQ44C
XC1801SO20C
XC18512SO20C
XC18256SO20C
XC18128SO20C
XC1804PC44C
XC1802PC44C
XC1801PC20C
XC18512PC20C
XC18256PC20C
XC18128PC20C
XC1804VQ44I
XC1802VQ44I
XC1801SO20I
XC18512SO20I
XC18256SO20I
XC18128SO20I
XC1804PC44I
XC1802PC44I
XC1801PC20I
XC18512PC20I
XC18256PC20I
XC18128PC20I
XC1801
XC18512
XC18256
XC18128




XC1800 Pinout will be updated soon..., now you can download the pdf datasheet to check the pinouts !
XC1800 circuits will be updated soon..., now you can download the pdf datasheet to check the circuits!

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