XC2C128 CoolRunner-II CPLD

The CoolRunner-II 128-macrocell device XC2C128 is designed for both high performance and low power applications. This lends power savings to high-end Communication equipment and high speed to battery operated devices. Due to the low power stand-by and dynamic operation, overall system reli- ability is improved This device consists of eight Function Blocks inter-con- nected by a low power Advanced Interconnect Matrix (AIM). The AIM feeds 40 true and complement inputs to each Function Block. The Function Blocks consist of a 40 by 56 P-term PLA and 16 macrocells which contain numerous configuration bits that allow for combinational or registered modes of operation. Additionally, these Registers CAN be globally reset or preset and configured as a D or T Flip-Flop or as a D latch. There are also multiple Clock signals, both global and local product term types, configured on a per macrocell basis. Output pin configurations include slew rate limit, bus hold, pull-up, open drain and programmable grounds. A Schmitt-trigger input is available on a per input pin basis. In addition to stor- ing macrocell output states, the macrocell Registers may be configured as direct input Registers to store signals directly from input pins. By Xilinx Corp.
XC2C128 's PackagesXC2C128 's pdf datasheet
XC2C128-6VQ100C
XC2C128-7VQ100C
XC2C128-6CP132C
XC2C128-7CP132C
XC2C128-6TQ144C
XC2C128-7TQ144C
XC2C128-6VQG100C
XC2C128-7VQG100C
XC2C128-6CPG132C
XC2C128-7CPG132C
XC2C128-6TQG144C
XC2C128-7TQG144C
XC2C128-7VQ100I
XC2C128-7CP132I
XC2C128-7TQ144I
XC2C128-7VQG100I
XC2C128-7CPG132I
XC2C128-7TQG144I




XC2C128 Pinout, Pinouts
XC2C128 pinout,Pin out
This is one package pinout of XC2C128,If you need more pinouts please download XC2C128's pdf datasheet.

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